Thread regarding Intel Corp. layoffs

TMG has not met headcount target of 12%

Multiple SLMs confirmed to their group today that TMG did not reach headcount reduction number of 12%. Only group close to target is PTD

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| 4336 views | | 18 replies (last June 9, 2016) | Reply
Post ID: @OP+HNXYflj

18 replies (most recent on top)

Person target decided

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Post ID: @1fjy+HNXYflj

TMG is probably the worst group in all of Intel. The company could save billions in long term opportunity cost if they just outsource the whole damn thing to the OSATs.

Be done with those overpaid folks getting their sh--ty MS and PhDs from bloated state schools like ASU and Florida State. Stay Home.

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Post ID: @1jdp+HNXYflj

I think majority of the head count cuts will come in the form of project cuts, after June 30. IMC has over 4K which they no longer will need, but don't quote me on this. Lol.🤔

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Post ID: @eke+HNXYflj

TSMC more people/wafer start = lower pay time time move fab over seas to china. Expand F68 baby and move to lost cost geo. High salary and entitlement in such an business is bad business. American workers watch out.

Hear TSMC has multiple shifts of engineers, good, not like poor FSM one engineer tied to phone and laptop 7x24 answer pages, dispo and other mindless things and get no sleep. TSMC model make more sense and better work life balance, LOL

Rumor got to meet cost structure

1) move more fabs overseas

2) cut more people

Either not a good thing for TMG!

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Post ID: @xui+HNXYflj

This is not surprising. The TMG mgmt was ruined when that idiot, BK, was there. They can easily layoff 50% of the remaining W employees and 90% of the mgmt.

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Post ID: @isz+HNXYflj

@yaj: If you do the Intel v TSMC compare for raw headcount numbers, TSMC has more people in the eng and tech job functions supporting manufacturing.

If you do the comparison using headcount COST, Intel spends a lot more.

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Post ID: @suf+HNXYflj

Question, why do FSM always have so many cost reduction projects to justify their engineers work/time and when implemented always do something bad to the wafers?

Answer: Because TD likes to make it very very expensive to justify extra heads in FSM to do some useless busy work.

Time for TD to develop a process that reflects real MOR and make that the real POR and make process really good instead of crazy expensive and get rid of the extra tools and people in FSM, that will save thousands of people and billions of dollars. LOL

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Post ID: @jjz+HNXYflj

What do you think Herr Stacy is asking Bain to do?

Let's do a wafer start to HC comparison to TSMC, and what do you think Bain will come back to tell Her Bean Counter, more heads more heads, LOL

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Post ID: @yaj+HNXYflj

I heard OP's mom met the head count. Congrats!

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Post ID: @ola+HNXYflj

I heard OP had his dick surgically curved to go up his @$$ when he gets an erection from his Viagra

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Post ID: @qxp+HNXYflj

I heard many groups exceeded the target and all is fine now...

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Post ID: @ifg+HNXYflj

Yea right. If any FLM or SLM gives out such info they will be booted by HR. So OP stop posting false news.

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Post ID: @zmc+HNXYflj

What groups and where are they going?

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Post ID: @wdg+HNXYflj

Useless software groups in PTD will go away.

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Post ID: @val+HNXYflj

No surprise that they didn't meet target. TMG has no idea how to run lean. All they know is spend, spend, spend. They still think they are the gods of the technology manufacturing world and haven't realized that they've been left behind to die in a lonely barren desert. I'm in TMG and I can say with all honesty that my organization is extremely bloated. We are forced to work on silly pet projects that have zero potential and are just a big waste of time and money.

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Post ID: @bmb+HNXYflj

There's some fat useless groups in there outside FSM/ATM and the TDs.

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Post ID: @sze+HNXYflj

programmable testing director?

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Post ID: @bgx+HNXYflj

Premenstrual tension department meet their targets?

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Post ID: @lnn+HNXYflj

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