https://vrworld.com/2017/02/10/intel-strategical-mistakes-amd-ftw/
If you would align your wristwatch to the sound of Intel’s tick tock, you would miss your important meeting. The launch of a new generation of processors represents a symbolic beginning of a new cycle and for Intel, “Kaby Lake” launch was everything but normal. First launching the Ultra-low Voltage parts (the U series), then the Desktop line-up and finally the mainstream notebook designs, with troublesome rumors about its enterprise, Xeon-branded counterpart.
Kaby Lake is perhaps too focused on the processor power task rather than processor performance. A lullaby. The same story for the last six years continues. Admittedly, for the past 18 months there were whispers that something big is going at AMD. A few months later the first RYZEN specimens are leaking into the wild. Ryzen is good and Intel after a decade in hibernation has a reason to wake up.
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Should AMD launch its 16C/32T or 32C/64T processor and the new 8-channel memory controller into the workstation and high-end desktop space (HEDT), the bandwidth results are all but guaranteed to walk all over anything Intel can offer today: Intel Skylake-X should reach 85.3 GB/s, while the AMD Naples should easily beat that with 170.7 GB/s. It gets worse though, as there are some leaked tests that show 8-channel memory controller supporting DDR4-3000: 192GB/s is the figure one AMD GPU can only dream off: of course, we’re talking about Radeon RX 460 (112 GB/s). And that’s a GDDR5 powered GPU. AMD processors for Socket SP3 and SP4 are starting to look tasty indeed.
These numbers could shake Intel the most; Xeon family. Intel is preparing Xeon Gold line of processors targeting the pro-consumer market of creative productivity applications. Xeon Gold line will be based on the 14nm “Skylake-EP” silicon. The first model that leaked is the “Xeon Gold 6150,” featuring 18 cores with HyperThreading. The core clock speed is 2.70 GHz and highest Turbo Boost clock is set at 3.70 GHz. It comes with 1MB of L2 cache per core and 24.75 MB of shared L3 cache (read: physical silicon has 22 cores, 4 disabled for yield purposes). Memory interface is (again) quad-channel DDR4 on a Socket LGA2066 (Purley is Xeon’s twin brother of Basin Lake for HEDT).