Thread regarding Intel Corp. layoffs

18A

Anyone have any idea if this is true? What is it relative to the current projection? When is it supposed to ship? Another delay and we will be toast. Is there a clear, high confidence, roadmap for the fixes? Are the fixes being urgently addressed at a urgent level? The entire company is hinges on it.

https://wccftech.com/intel-foundry-fails-to-impress-once-again-18a-process-yield-rates-poor/

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| 2351 views | | 17 replies (last December 8, 2024) | Reply
Post ID: @OP+1vRRdUGs

17 replies (most recent on top)

Pat Gelsinger's total compensation from Intel for each year since 2021:
2021
Pat Gelsinger's total compensation for 2021 was $178.59 million1. This exceptionally high amount included:
Base salary: $1.1 million
Cash hiring bonus: $1.75 million
Stock awards: $140.4 million (approximately 78% of total compensation)
Stock option awards: $29.1 million
Non-equity incentive plan compensation: $5.1 million
Other compensation: Just over $1 million
2022
Gelsinger's total compensation for 2022 was $11.61 million2.
2023
His total compensation for 2023 increased to $16.86 million2, which included:
Base salary: $1.07 million (down 18% from 2022)
Stock awards: $12.43 million
Non-equity incentive plan compensation: $2.89 million
Deferred compensation: $112,000
Other compensation: $362,900
2024
Base salary (11 months): Approximately $1.14 million (11/12 of his $1.25 million annual salary)57
Severance package components:
18 months of base salary: $1.875 million12

  1. 5 times his target bonus: $5.16 million25

Pro-rata 2024 bonus (11/12ths): Approximately $3.15 million23
The total severance package is estimated to be up to $10.18 million23.
Therefore, Pat Gelsinger's total compensation for 2024, including his severance package, can be estimated as follows:
$1.14 million (base salary for 11 months) + $10.18 million (severance package) = $11.32 million

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Post ID: @1bwn+1vRRdUGs

18A is a scam like 3D Crosspoint, Edison, and the q-bit CPU.

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Post ID: @1ovi+1vRRdUGs

Intel managers are liars. This is the reason why it failed. Everything must fail with liars.

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Post ID: @qxg+1vRRdUGs

If any news/words come from managers (LTD staff), then it is not true. Again and again, TD managers are cheated and fooled by "good news", they can not make a common sense judgement. I have seen many times that people go to Ann and LTD staff to give them fake news in colorful slides tailored to make them happy.

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Post ID: @mut+1vRRdUGs

@piq
Out of the woods? Not even out of the underbrush.
Things are much, much worse then publicly disclosed.

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Post ID: @gpq+1vRRdUGs

I don’t think we are out of the woods , but it’s not as bad as painted. pats demise is not based purely on 18A ramp.

Bit annoyed he came in, sc--wed the pooch , layed me off then got fired though :)

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Post ID: @piq+1vRRdUGs

TD should be outsourced

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Post ID: @lvx+1vRRdUGs

Seems like TD engineers are faking data on PowerPoint slides. Yields of stupid decisions seems to be healthy.

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Post ID: @eny+1vRRdUGs

If 18A doesn't work, just stop all foundry plans and construction. This is the end.

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Post ID: @och+1vRRdUGs

If 18A was on track vs advertised, then Pat would not have been forced out. He was clear about his strategy - bet the farm on 18A. If 18A was on track, his bet would have been safe and he would not be forced out.

It is also possible that board is incompetent and just now realized that betting the farm on 18A was not a great strategy. I would actually feel quite bad for Pat of 18A was on track and yet he was forced out.

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Post ID: @xkw+1vRRdUGs

It is time for intel to have a new leadership in TD. Can't keep on missing and coming up with excuses. TSMC is not.

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Post ID: @jwj+1vRRdUGs

The competitor is not slowing down for Intel to catch up.
https://www.gsmarena.com/tsmc_hits_60_yield_on_2nm_chip_trial_production_-news-65650.php

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Post ID: @jyi+1vRRdUGs

@BK That sounds better and about right for yield ramp. Thanks.
Right now I don't think they would tell us if it was that bad. I do not trust many TD execs.

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Post ID: @jxa+1vRRdUGs

it is old news, and virtually always is very dated information from Intel or any other ramping fab

yes the yields were poor earlier on, but they have improved

still not where they need to be but that is 'roughly' normal during a ramp

this is not 10nm all over again, but they have been challenged by all the technologies they are trying to implement at once

the historical issue which has existed on all 300mm processes is the desire of TD to pile too many changes into each node

this approach has not actually improved, and is in stark contrast to how TSMC makes changes incrementally

really need to remove a number of TD executives over this deeply flawed approach and refusal to learn that it simply doesn't work

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Post ID: @luy+1vRRdUGs

Why would another slip mean we are toast? It has happened in the past, and nothing happened. Sure there will be blowhards venting on CNBC, Youtube channels and podcasts, but do real hard cash paying customers care? What options do they truly have?

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Post ID: @qxd+1vRRdUGs

It is unthinkable to continue on the same path. The fab is the drag and no one outside Intel wants it. Spinning it off or just writing it off, there is not much time left with such a huge weight on Intel's back.

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Post ID: @qge+1vRRdUGs

When the well is dry, we know the worth of water.

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Post ID: @vvs+1vRRdUGs

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