Thread regarding Intel Corp. layoffs

Panther Lake in Risk production

We are told that "risk production" is an industry standard. How come I am hearing it for the first time, having been in Intel for 25 years! We used to have vaporware products. I guess we now also have vaporware process!!!

Can understand the panic with future resting on 18A

by
| 1851 views | | 6 replies (last April 3, 2025) | Reply
Post ID: @OP+1jqtn05y9

6 replies (most recent on top)

Because Intel never took a risk in 25 years, just ran an old rundown factory to the ground then selling for scrap.

by
| | Reply
Post ID: @g4+1jqtn05y9

I can only assume "risk production" is the same as "risk starts" or "pre-production wafers". That said, these are typically pre-PRQ units which could turn into production units once the product does PRQ (or they can just get built as a special sku which never sells, and sits in inventory till it's reserved and ultimately scrapped). The question is what is being built, what are the yields, and current/future cost structure. Unless IFS can get it's cost structure in-line/spitting distance with TSMC, it doesn't really matter since they'll never sell a unit externally (and Intel Products will just keep subsidizing IFS forever).

by
| | Reply
Post ID: @d5+1jqtn05y9

risk build is standard process

by
| | Reply
Post ID: @ca+1jqtn05y9

So January 2026 launch?

by
| | Reply
Post ID: @c5+1jqtn05y9

Did Pat teach this company nothing? The future rests with Jesus, my guy.

Look around at the world. Take a big whiff. Rest easy, big dawg, the chump wearing a crown of thorns has it handled.

by
| | Reply
Post ID: @bj+1jqtn05y9

Intel ran before risk production for 14nm, 10nm, 7nm etc. Actually risk production means that fabs are starting mass production before product certification. Chips from risk production will be sent to customer only after certification. The certification itself can take 3-6 months.
The same procedure was used by TSMC for many tears and Intel has copied it.

by
| | Reply
Post ID: @an+1jqtn05y9

Post a reply

: